Dr. Remya Jayachandran
Department of Electronics & Communication Engineering
|About Me:||Dr. Remya Jayachandran has joined as Assistant Professor in the Department of Electronics and Communication Engineering, NIE Mysuru on 24th February 2019. She has a total experience of 10 years - 5 years of Teaching experience in various reputed institutions and 5 years of Research experience at NIT Calicut. She has obtained Ph.D. in the area of Analog Circuits Designfrom National Institute of Technology, Calicut in 2021, where she was a full time research scholar in the Department of Electronics & Communication Engineering, NIT Calicut. Her research work was selected as part of the project under SMDP-C2SD Phase II at NIT Calicut and have successfully completed the chip design of the buffer amplifier IC. The fabrication of the designed buffer amplifier ICin 180 nm technology node was done in SCL Chandigarh, India funded by the SMDP-C2SD II and testing and verification of the buffer amplifier IC were done in the department of E&C, NIE Mysuru. She has filed an Indian patent on her research work on N-stage CMOS-OTA Buffer amplifiers in October 2016 which is currently in the examination stage. She has secured First Rank with Gold Medal in MTech VLSI design at Amrita Vishwa Vidyapeetham University in 2013. She has also qualified UGC-NET (Electronics) in December 2012 and June 2013. Her research interests include mixed signal circuit design, Nanoelectronics in biomedical and agricultural applications, MEMS etc. She was the coordinator of AICTE sponsored 5 days ATAL FDP on “Hands-on Approach For the Design and Implementation of Lab on Breadboard –A Blended Learning” held on July 2021, coordinator of the National Level Project Exhibition 2022 (Virtual mode) and coordinator of various Webinars and Student Development Programs organized by the Department of ECE, NIE Mysuru. She serves as reviewer for various reputed journals such as Arabian Journal for Science and Engineering (Springer), International Journal of Nanoparticles (Inderscience),International Journal of High Speed Electronics and Systems etc. and also in many reputed International Conferences.|
- B.Tech. degree in Electronics and Communication Engineering from IHRD College of Engineering Poonjar, Kerala, CUSAT University in 2009.
- M.Tech. degree in VLSI Design Amrita Vishwa Vidyapeetham University, India in 2013.
- Ph.D. degree in Electronics and Communication from National Institute of Technology Calicut in 2021 .
- IOT based Fuel Quality Estimation
- Nano-sensors for biomedical applications
- High Frequency Oscillator design using transconductance amplifier
- Advanced Footstep Power generation (NIE-CRD 2022)
- Remya Jayachandran, Dhanaraj K J, P C Subramaniam, “Planar CMOS and multigate transistors based wide-band OTA buffer amplifiers for heavy resistance load”, FACTA UNIVERSITATIS Series Electronics and Energetics, Vol.35(1), March 2022. https://doi.org/10.2298/FUEE2201013J
- Remya Jayachandran, Rama S Komaragiri, P C Subramaniam, Ranjith R, “High performance Reconfigurable FET for a Simple variable gain buffer amplifier design,” International Journal of Electronics,Vol. 109, 1, pp-100-118, 2022 , https://doi.org/10.1080/00207217.2021.1908618
- Remya Jayachandran, P C Subramaniam, DhanarajK J, “A novel tunable gain CMOS buffer amplifier for large resistive loads,” Integration, The VLSI Journal, (Elsevier), vol. 77, pp. 1-12, Mar. 2021, https://doi.org/10.1016/j.vlsi.2020.10.007
- Ranjith R, Remya Jayachandran, K. J. Suja, Rama S Komaragiri, “Two dimensional analytical model for a reconfigurable field effect transistor,” Superlattices and Microstructures, vol. 114, pp. 62-74, February 2018, https://doi.org/10.1016/j.spmi.2017.12.006
- Helna Aboobacker, Aarathi R Krishna, Remya Jayachandran, “Design, Implementation and Comparison of 8 bit 100MHz Current Steering DACs,” International Journal of Engineering Research and Applications, Vol. 3, No. 4, pp. 877-880, August 2013.
- Aarathi R Krishna, Helna Aboobacker, Remya Jayachandran, “Design and Implementation of 7 bit 100MHz Flash ADC,” International Journal of Engineering Research and Applications, Vol. 3, No. 4, pp. 881-886, August 2013.
- Remya Jayachandran, Rama S Komaragiri, P C Subramaniam, “Study of circuits based on SOI-vertical Gate-All-Around FET," In 15th IEEE India Council International Conference, INDICON, December 2018 held at Amrita Vishwa Vidyapeetham Coimbatore. 10.1109/INDICON45594.2018.8987021
- Remya Jayachandran, Rama S Komaragiri, P C Subramaniam, “Reconfigurable circuits based on single gate reconfigurable field effect transistors," In 6thIEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), July 2020 held at GITAM University, Bangalore. 10.1109/CONECCT50063.2020.9198322
- Remya Jayachandran, K J Dhanaraj, P C Subramaniam, “Hardware realization and testing of multistage OTA buffer amplifier for heavy resistive load," In 3 rd IEEE International Conference on Devices for Integarted Circuits (DevIC 2021), May 2021 held at Kalyani Government Engineering College, Kolkata. 10.1109/DevIC50843.2021.9455806
- Remya Jayachandran, Rama S Komaragiri, Dhanaraj K, J, "Simulation of Reconfigurable FET circuits using Sentaurus TCAD tool", Book Chapter in Sub-micron Semiconductor Devices: Design and Applications, CRC Press, Taylor & Francis, 2022, 10.1201/9781003126393-11
- Indian Patent: N-stage OTA buffer amplifiers with unity gain and high input dynamic range and tunable gain for driving large resistive load (Published in Indian Patent journal April 2019, Application Number: 201741035499) Inventors: Remya Jayachandran, P C Subramaniam (NIT Calicut)
- Electronics Circuits I & II
- Basic Electronics
- Digital Electronics
- Linear Integrated circuits
- Audio & Video Engineering
- Artificial Intelligence
- Engineering Management
- Analog CMOS Design -I
- Electronics Fundamentals
- Network Protocol Engineering
- Analog CMOS
- Qualified UGC NET in 2012
- First Rank with Gold medal in MTech VLSI Design, 2013
- Successfully defended the thesis work on “High performance OTA Buffer amplifiers for driving resistive load” in October 2021, NIT Calicut
- Completed the tapeout, testing and verification of CMOS OTA Buffer Amplifier IC in 2020
- Coordinator of AICTE sponsored 5 days ATAL FDP on “Hands-on Approach For the Design and Implementation of Lab on Breadboard –A Blended Learning” held on July 2021
- Coordinator of the National Level Project Exhibition 2022 (Virtual mode) held on April 2022
- Faculty advisor of IEEE NISB, IEEE CAS and IEEE WIE, NIE Mysuru
- Resource person for the online workshop on “Analog IC design flow” in ILLUME 2020 organized by IEEE CAS, NISB (https://youtu.be/PhZpGTjbTJU)
- Resource person for the Workshop on Basics of Analog and Digtal CMOS Design (VLSI) with LTspice in ADROIT 2021 organized by IEEE NISB.
- Coordinator of various Webinars and Student Development programs organized by the Department of ECE, NIE Mysuru